GE020013 GE2/13
GE020014 GE2M/14
GE020015 GE2/15
GE020016 GE2/16
GE020017 GE2/17
GE020018 GE2S/18
GE020019 GE2/19
+5V 50mA. Unsupported card 93mm x 62mm, C06 64 way plug.
DD 1978.
Polari ty Check Pulse Generator. Produces a 500Hz pulse
with 5:1 mark/space ratio for sending over audio circuits
to activate MN4/6 Polarity Check Unit. Power requirements
t12V at 20mA. CH1/65A. DD 1978.
Timecode Events Pulse Generator. Generates start pulses
which are timed to occur at given timecode frames. The
generator accepts a feed of timecode and stores timecode
events which are then used to generate the start pulses
when
coincidence
occurs.
Power
requirements
240V
a.c.
mains. PN3A/53C. Sub-units CD3/530, SE5/8, U N27/11,
UN23/135 and PS4/7. DD 1980. DDMI 7.471(81).
Audio Pulse Generator. This unit forms part of the Tone
Distribution system for BH, London. Bursts of tone are
generated at regular intervals in time, the frequency of
the tone being determined by that of a continuous supply of
tone applied externally. Pulse repetition rate is
selectable at 5,10,15,20 and 30 seconds. Output pulses are
synchronised to 1 min BH clock. There are two outputs, one
of which can be muted externally. Power requirements t12
volts at 100mA (PS22/163). CHl/65A. Supersedes UN1/180
and UN1/81. DD 1982. DDMI 3.717(82). DDHB 3.287(83).
H.V. Pulse Generator. H.V. Pulse Generator (200 V 30 ns
H.A.D) designed to be used in conjunction with ME1/11 to
form time domain reflectometer system capable of locating
fault conditions on S.W. sender feeders. Power
requirements 115 or 240 Vac. 220 x 120 x 85 mm. DD 1985.
Clock Pulse Generator. This unit forms part of the Digital
Stereo Sound with Terrestrial Television Coder. The unit
provides clock signals, at frequencies of 1774. 2MHz and
128kHz, used by other boards in the Coder. These clock
signals are derived from crystal oscillators at 17.472MHz
and 16.384MHz respectively, with frequency-division where
necessary. Power requirements +5V, -12V. 4U unsupported
p.c.b with PN1/29J front panel. Chassis extender CH4/5.
Parent equipment CD2SM/39. RD 1987.
Decoder PLL. This unit forms part of the Digital Stereo
Sound with Terrestrial Television Decoder. The unit takes
the recovered 728kHz data clock from the demodulator, and
uses phase-locked-loop techniques to generate a 17.472MHz
master clock signal from a crystal oscillator, locked to
the
incoming data clock.
The 17. 742MHz clock signal is
used to control other circuis in the 728kbit/sec decoder,
CD3SM/54. Power requirements +5V, t12V. 4U unsupported
p.c.b with PN1/29J front panel. Chassis extender CH4/5.
Parent equipment CD3SM/54. RD 1987.
Master Clock Generator. This unit is for use in the
Digital Stereo Sound with Terrestrial Television Modulator.
It uses a phase locked loop to lock a 11.648 MHz oscillator
(16
x
728
kHz)
to
the
728
kHz
data-clock signal.
The
11.648 MHz clock signal is the output to the digital
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