Power requirements 250V ac 50Hz at 80VA. 4U BMM Frame. DD
1981. DDHB 6.203(83).
16-way Decimal Binary Coder. Any single high-level input
from a range of 16 inputs is encoded to parallel binary
outputs. If more than one input is selected simultaneously
only the highest number is encoded. 4U version of CD2/18.
PA6/131. DD 1981.
64-way Coder. Samples the binary state of 64 inputs using
a 6-bit binary address. Two extra address bits allow the
block of 64 addresses to be set within the range 0-256
using links. Power requirements +5V. CH1/64J. DD 1981.
64-Way Coder. Identical to CD2/25 in mechanical layout and
electrical Performance, but some suppression components
added. Power Requirements 5 Vdc. 4U Unsupported Card with
J. Width Front Panel. Chassis Extender CH4/5. Parent
equipment EP1/30. DD(2) 1986.
pre-programmed Bearing Encoder. Accepts 3-digit B.C.D
input and converts these numbers to a 2-byte pattern that
can be entered sequentially into a microprocessor input
Parent equipment PA6/132. DD 1983.
676 kbit/s Tamed FM Coder. Accepts a 676 kbit/s HDB3 input
(e.g. 2-channel NICAM) and generates the two quadrature TFM
coded (a form of PSK), baseband signals required by the
Intended for use with MD4/2,
CD3/46 as part of CML link PML 15. Power requirements +5 V
500 mA, +15 V 100 mA, -15 V 100 mA. Unsupported P.C.B.
9" x 5" approx. EDI 10501(1)JAN85. DDMI 5.446(84). DD
Stereo Test Coder. Portable test coder for Transmitter
maintenance team use, working to the Zenith - GE system.
Standard multiplex output together with switchable pilot,
requirements 240 V ac <30 VA. Proprietary Case. Sub-units
CD2/30. DD 1985.
Stereo Coder. Printed circuit board containing heart of a
stereo test coder working to the Zenith - GE system.
Printed circuit board. Parent equipment CD2M/29. DD 1985.
EDI 10517(1)JUL 85.
2048 kbit/s PSK Coder. Accepts 2048 kbit/s HDB3 input and
generates the quadrature modulation waveforms required by
the MD4/5 Modulator. Intended for use with MD4/5, DM4/6,
CD3/48. Power requirements +5 V, 900 mA; -5 V, 250 mA. 4U
PCB mounted in a CH1/64A chassis. Parent equipment TM2L/6.
DD 1985. EDI 10517(1)JUL85. DDMI 5.445(85).
6-bi t Checksum Coder. 6-bi t checksum coder for Plessey
8448 kbits/s multiplexer. It provides a facility for
monitoring programme-modulated 8448 kbits/s distribution.