compares this code with another similar input. A tru~
comparison causes this second input and a further set of 8-
bit parallel binary code to be held in latches for use
elsewhere, such as in display devices. 'A' version will
allow up to 16 different codes to be compared. Power
requirements +5 V. CH1/64J. Parent equipment EP1M/47.
Chassis extender CH1A/43. DD (2) 1985.
19kHz Pilot Decoder. This unit comprises a single 19kHz
Tone Decoder which accepts standard level as an input.
Four outputs; fully isolated via opto-isolators are
provided for locking switch mode power supplies. Power
requirements 50v DC at 30mA. 4U BMM 19" panel. Parent
equipment AM14/51. DD 1981. DDMI 5.418(82)
Tone Decoder. Receives FSK audio tone signal. It decodes
the 3 tones and provides 3 logic outputs and 2 sets of
relay c/o contact outputs. Power requirements +12V +5V
-5V. 4U unsupported PCB with PN1/29 front panel assembly.
Parent equipment TM1M/4. DD 1982.
Timecode Decoder. The card consists of half CD3/39
timecode decoder and interface circuitry for a UN26/46
single board computer. Input signals from a video
cas setter recorder are processed by the unit and passed to
Timcode information produced by the UN26/46
is latched by the unit. +12 V, +5V. 4U BMM unsupported
card. DD 1982. nDMI 7.507(83).
676 kbit/s Tamed FM Decoder. Accepts two quadrature, TF
coded, baseband signals from a DM4/5 and provides two
separately buffered 676 kbit/s HDB3 outputs. The outputs
are suitable for use by 2-channel NICAM. Intended for use
with CD2/28, MD4/2 and DM4/5 as part of CML link PML 15.
Power requirements +5 V 600 mA, +15 V 200 mA, -15 V 150 mA.
Unsupported P.C.B. 9" x 5" approx. EDI 10500(1)JAN 85.
DDMI 5.447(83). DD 1983.
Animation Decoder. Data decoder for BBC1 Logo
Generator - O.W.L. Decodes the compressed sequence data
into a 13.5MHz real-time data stream. Power requirements
equipment GE6S/565. EDI 10518(1)JUL 85. DD 1984.
2048 kbit/s PSK Decoder. Accepts two quadrature PSK
baseband signals from a DM4/6 Demodulator and provides two
buffered 2048 kbit/ s HDB3 outputs. Intended for use with
CD2/31, MD4/5 and DM4/6. Power requirements +5 V, 600 mA;
-5 V, 120 mA. 4 U PCB mounted in a CH1/64A chassis.
Parent equipment RC2L/4. DD (5) 1985. EDI 10518(1)JUL85.
676 kbit/s LINEAR PCM DECODER. A 676 kbit/s linear 14 bit
PCM decoder for use in O.B. 1.5GHz Link Equipment. Power
requirements t15V. Modified 3U unsupported pcb. D (Sec.6)
1985. HB A.1009(87).
Tape Timer Decoder. This unit accepts the tape timer data
and clock waveform from the remote connector of a VPR6 VTR