small system. Front panel displays and switches aid in the
diagnostic function. Automatic reset circuitry is provided
for use in unattended applications. Power requirements 5V
at 1.5 A max. 4U BMM unsupported card with 57 way edge
2.477(82). EDI 10372(1)MAR80.
Vidiprint 8085 Processor. Conversion of serial data in 7.5
or 11 unit codes, at 50, 75 or 110 baud, to parallel data
in ASCII format. Edits characters in a row to a maximum of
34, and controls storage of characters in external store in
a form suitable for display via character generator unit.
Power requirements +5V. Parent equipment GE8M/504. DD
Processing Unit. General purpose card with self-contained
power supplier based on an Intel 'UPI-4l' pro cessor. The
card has provision for 3 V28 or RS-232-C or 80-0-80V inputs
with 3kV isolation and 8 V28 or RS-232-C outputs. Switches
are provided for input of 8 options and an external divider
requirements 250V, 3W a approximately. Card l80mm x 110mm.
Parent equipment C04/7. DD 1980.
NICAM 3 Compressor. This unit accepts l4-bit samples from
the NICAM 3 data bus and compresses them to 10 bits as
required by the range control. Power requirements 5V.
CH1/64J. Parent equipment CD2M/17. DD 1980.
NICAM 3 Expander. This unit accepts 10-bit compressed
samples from the NICAM 3 data bus and expands them to 14
bits as required by the range control. Power requirements
5V at 260mA. CH1/64J. Parent equipment CD3M /33. DD
6800 Processing Uni t. The uni t incorporates a Pro log PLS
868 Microprocessor Card which plugs into a socket mounted
on the UN26/37. The UN26/37 contains an auto reset
circuit. Power requirements +5V 1.2A maximum. 4U BMM
unsupported card. Parent equipments EP10M/501, EP10M/502
and GE2M/14. DD 1980. DDMI 7.461(81).
280 Processor. This unit if the Central Processor for the
Floppy Disk Field Store, RD4M/508. It contains a UN26/39,
280 (Main Board), and a customised Front Panel on a
PN1/29A. Power requirements 5V lA. 4U BMM unsupported
card with PN1/29A front panel. Sub-unit UN26/39. DD 1980.
280 Processor (Main Board). This unit is intended to be
the CPU of a microprocessor system. It incorporates a 280
Microprocessor, clock driver circuitry, bus buffers and a
small amount of RAM and PROM memory. This memory allows
the unit to run a program in a self-contained manner
principally for self-test and diagnostic purposes, but it
may be the entire memory in a small system. Automatic
reset circuitry is also provided for use in unattended
applications. The unit does not include the PROM itself or
the front panel. It is the main board for a separately