UN260040 UN26/40
UN260041 UN26/41
UN260042 UN26/42
UN260043 UN26S/43
UN260044 UN26/44
UN260045 UN26/45
coded unit. Power requirements 5V lA. 4U BMM unsupported
card. DD 1980.
Processing Unit. PCB with 8035 Processor and provision for
up to 2K BYTES of ROM. Two serial inputs and one serial
output are provided, all nominally RS 422 compatible, with
parallel outputs suitable for driving one IEEE 488 (HPIB)
Bus
load.
Power
requirements
5V DC.
Parent
equipment
c04/12, c04/12A, c04/13. DD 1980.
Nicam 3 Signalling and Monitoring Compressor. This unit
performs three functions:
(a) It accepts 14-bit samples from the NICAM
3 data bus and compresses them to 10
bits.
(b) It provides access to the eight signall-
ing bits in the stereo bitstream.
(c) It integrates the monitoring outputs of
all the other cards and provides an
output to the reserve facilities unit.
Power requirements 5V. CHl/64J. Parent equipment CD2M/17.
DD 1980. DDMI 6.368(80). DDHB 6.212(83).
Nicam 3 Signalling and Monitoring Expander. This unit
performs three functions:
(a) It accepts compressed samples from the
NICAM 3 bitstream and expands them to 14
bits.
(b) It provides parallel output of the eight
signalling bits from the bitstream.
(c) It integrates the monitoring outputs of
all the other cards and provides an
output to the reserve facilities unit.
Power requirements 5V. CHl/64J. Parent equipment CD3M/33.
DD 1980. DDMI 6.374(80). 6.217(83).
Data Processing Unit. Based on UN26/22 board, designed to
be used in MIC main store panel, accepts data from MIC
Keyboard, scans MIC store and displays information on MIC
upper
VDU.
Power
requirements
+5V
0.5
Amp.
CHl/64A.
Parent equipment inserted into PA1M/101 main store rack.
DD 1981.
Miscellaneous Pulse Processor. The unit comprises two Z80
CTC's for general timing applications, a buzzer circuit for
'end of line bell' indications in VDU's, and a monostable
to allow correction of keyboard strobe pulse durations. It
is compatible with Z80 bus structures as far as possible.
Power requirements +5V DC at 500mA. CHl/64J (unsupported
4U card). Parent equipment UN12M1513. DD 1981.
Parallel 1/0 Buffer. The unit comprises an 8255 parallel
1/0 device, and bi-directional TTL buffering for six 8-bit
data busses to or from UN23/130 programmable 1/0 unit. It
may be fitted , as in option, into a Zelda chassis
PA6M/108 either in place of a UN23/130 or in addition to
it.
Power
requirements
+5V
d.c.
at
500mA.
CHl/64J
(unsupported 4U card). Parent equipment PA6M/108
(OPTIONAL). DD 1982. DDHB 2.484(83).
335

35