the selected colour from the encoded output of an LDK5
Camera Surveillance Unit. Power requirements +12V, +5V,
OV, -6V. Parent equipment UN26/562. DD 1982.
Colour Matching Unit. This unit enables the colour
graphics RG and B outputs of DOG, GE6M/548 to be precisely
matched to another video source or to defined levels. Four
sets of three potentiometers are provided for the precise
adjustment of four colours. Power requirements +5V DC.
Parent equipment UN26/557A. DD 1982. DDMI 8.644(82).
ACE/TARIF Interface Unit. The unit provides sync. separ-
ation required to drive TARIF TWO EP6L/509, and delays the
video required to drive the clock generator GE3/507 in the
Standards Converter C06/5l0. Power requirements +12V, -
l2V. 4U PCB with J width front panel and 57-way edge
connector. DD 1982.
Double Co-efficient Unit. Used in the predictor chain of
the DPCM coder and decoder, CD2M/525 and CD3M/S4l, to
generate the first two terms of the prediction and sum
these with the sum of the other prediction terms. Power
requirements +5V at O.lA; -5V at 4A. BMM 4U unsupported
card. Parent equipment CD2M/525, CD3M/54l. DD 1982.
Triple Co-efficient Unit. Used in the predictor chain of
the DPCM coder and decoder, CD2M/525 and CD3M/54l, to
generate three prediction terms and sum these with the sum
of previous terms. Power requirements +5V at 2.6A, -5V at
CD2M/525, CD3M/54l. DD 1982.
Coder Input Unit. Used at the input of CD2M/52S. Accepts
lO-bi t comb filtered data, together with 4 Fsc and 2 Fsc
signals to coder and FIS cards. Contains programmable bit
sequence generator and clock oscillator for self-test of
the complete coder by use of a logic analyser, or signature
analyser. Includes data sampling facilities and address
unsupported solder-wrap card. Parent equipment CD2M/S25.
Coder Output Unit. Used at the output of CD2M/S25. Pro-
vides 6-bi t DPCM balanced ECL output, and also a lO-bi t
locally decoded balanced ECL output. Provides selection
between FIS and DPCM inputs, and provides a preset delay of
up to 1.8 line periods for FIS data.
timing adjustment of the outgoing 4Fsc clock. Addition-
ally, accepts lO-bit locally decoded parallel data inputs.
Includes local data monitoring facilities (selectable via
an address decoder) and signature analysis test points.
+5V at 1.4 amps, -SV at 1.6 amps. BMM 4U unsupported
solder-wrap card. Parent equipment CD2M/S2S. DD 1982.
Decoder Input Card. Used at the input to DPCM decoder
CD3M/S41. Accepts 6-bit balanced ECL DPCM inputs, 4Fsc
clock inputs. Routes data to FIS and decoder cards.
Includes line and field rate (programmable) bit sequence