UN260577 UN26/577
UN260578 UN26/578
UN260579 UN26/579
UN260580 UN26/580
signals. This input signal is accepted in partially-
decoded form from associated unit UN26/585 as 2 data lines
with a 2048kHz clock, all at TTL levels. It is inserted
into a 6-bit signal, of nominal word rate 11.456 Mword/s,
which is accepted and output at TTL levels. A small
capacity for signalling is provided. The uni t forms part
of equipment CD4M/504 which multiplexes together digital
video and other signals to produce an output signal at 68
Mbit/s. Power requirements +5V at current to be advised.
4U Solderwrap card with J width front panel. Parent
equipment CD4M/504. RD 1982.
Radio Tributary Unit. Unit asynchronously multiplexes a
8448 kbit/s 2nd-order multiplex signal with other digital
signals. This input signal is accepted in partially-
decoded form from associated unit UN26/585 as 2 data lines
with a 8448kHz clock, all at TTL levels. It is inserted
into a 6-bit signal, of nominal work rate 11.456 Mword/s,
which is accepted and output at TTL levels. A small
capacity for signalling is provided. The uni t forms part
of equipment CD4M/504 which multiplexes together digital
video and other signals to produce an output signal at 68
Mbi t/ s. Power requirements +5V at current to be advised.
4u Solderwrap card with J width front panel. Parent
equipment CD4M/504. RD 1982.
De-Serialiser Unit. The unit de-serialises a 68 Mbi t/ s
input signal. The input is accepted in the CMI interface
code format, at standard level into 75 ohm. This decoded,
and from it is generated a 6-bit parallel signal at 11.456
Mword/s, together with a 11.456MHz clock and frame-marker
pulse. Outputs are at TTL levels. The unit forms part of
68 Mbit/s demultiplexing equipment CD4M/505. Power
requirements +5V, -5V, at current to be advised. PNl/29J.
Parent equipment CD4M/505. RD 1982.
Video De-tributary Unit. The unit demultiplexes a digital
video signal from a 68 Mbit/s signal. The latter is
accepted in 6-bit parallel form (at 11.456 Mword/s)
together with frame-marker pulse nad a 11.456 MHz clock.
The appropriate words are written into a buffer store and
output at a steady rate, still in 6-bit form together with
a 4fsc clock and 2fsc enable signal, all at balanced ECL
levels. Other inputs and outputs have TTL levels. Unit
receives 4fsc clock from a phased-locked loop in unit
GE2/643A, for which control signals are provided. The unit
is complementary to unit UN26/574, and forms part of 68
Mbit/s
demultiplexing
equipment,
CD4M/505.
Power
requirements +5 V, -5 V at currents to be advised. 4U
solderwrap card with
'J'
width
front
panel.
Parent
equipment CD4M/505. RD 1982.
Sound De-tributary Unit. The unit demultiplexes a 676
kbit/s signal (normally containing 2 digital sound signals
for television) from a 68 Mbit/s signal. The latter is
accepted in 6-bit parallel form (at 11.456 Mword/s)
together with frame-marker pulse and a 11.456MHz clock.
The appropriate words are written into a buffer store and
the data are output at a steady rate in suitable format for
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